How Application-Driven Performance And Reliability Requirements Shape Design and Qualification Of GaN Power Devices
by Sam Abdel-Rahman and Deepak Veereddy, Infineon Technologies, El Segundo, Calif., How2Power Today, Jun 15 2020
Focus:
The structures of GaN power transistors and their operating mechanisms differ from
those of silicon (Si) power MOSFETs. These differences account for the performance
advantages of the GaN transistors, but also impose different gate-drive requirements
and imply different failure mechanisms. This article describes how GaN power
transistors differ in structure and performance from their Si counterparts, the
different approaches to achieving normally off operation, gate structures used to
design enhancement-mode devices and gate-drive requirements, particularly as they
relate to Infineon’s CoolGaN devices. This article also describes the extensive tests
conducted by Infineon to confirm the robustness of the gate structure and to qualify
these new devices for in-field applications, particularly telecom power supplies.
These tests include both those already employed to evaluate the reliability of silicon
MOSFETs as well as the newer tests developed in the new wide-bandgap JEDEC standards
to address the distinct failure modes of GaN devices.
What you’ll learn:
- How to understand the distinct failure modes associated with GaN power transistors
- How to understand the tests being applied in industry to evaluate GaN device reliability and qualify these devices for the intended applications
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