PDN Basics–Paralleling Tantalum and Ceramic Capacitors Can Be Risky
by Steve Sandler, Power Electronics Technology, Nov 27 2013
Focus:
A common practice in electronic system design is to use electrolytic capacitors for bulk
capacitance in combination with ceramic caps of different values such as 0.1 uF, 0.01 uF
and 0.001 uF for decoupling. But this practice produces an impedance curve that may have
troublesome resonances and does not yield the desired target impedance for the system’s
PDN. In this article, a series of impedance measurements and simulations are performed to
show how capacitor value, ESL and ESR affect the impedance curve for the parallel
combinations of capacitors and how they affect PDN impedance on a PCB. Guidelines are
given for selecting the capacitors that will achieve the desired target impedance and make
it as flat as possible over frequency. A PDN design example is given.
What you’ll learn:
- How to select bulk and decoupling capacitors to achieve the desired flat target impedance
- How to simulate and measure impedances of bulk and decoupling caps
View this Source (requires a PDF Viewer installed on your device)
© 2025 How2Power. All rights reserved.