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Developing A 25-kW SiC-Based Fast DC Charger (Part 5): Control Algorithms, Modulation Schemes And Feedback

by Oriol Filló, Dionisis Voglitsis, Karol Rendek, Stefan Kosterec and Rachit Kumar, onsemi, Phoenix, Ariz., How2Power Today, Aug 15 2021

Focus:
In the previous parts of this series, the authors have extensively described the development of a 25-kW EV charger from a hardware perspective. This part 5 explores the implementation of the control strategy and algorithms for such a system. It provides firsthand details on the approach to control hardware and software development that the engineering team has taken, which helps speed up the firmware development and the validation process. The development process described here ensures that errors are minimized and detected early on, even before prototype hardware becomes available or is being designed. This part describes the steps and tools (MathWorks and Xilinx) to implement such an approach, the state machine and algorithmic blocks for the power factor correction (PFC) stage, and the main algorithmic blocks for the DAB converter.

What you’ll learn:

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