Why EM Is Replacing SPICE For Simulation Of Board-Level Power Delivery
by Heidi Barnes, Keysight Technologies, Santa Rosa, Calif. And Steve Sandler, Picotest, Phoenix, Ariz., How2Power Today, Nov 15 2021
Focus:
Signal integrity engineers designing power delivery to high-speed digital loads are
finding out the hard way that lumped-SPICE simulations are leaving out critical time
delays and parasitic behaviors that only an EM simulated model of the PCB interconnect can
get right. Getting it wrong can result in incorrect prediction of power rail resonances
and lead to voltage regulator designs that are on the edge of instability and lead to
complete failure of the high-speed circuitry. This article discusses and demonstrates the
differences in simulation results obtained with lumped-SPICE modeling of circuits lacking
PCB parasitics versus simulation results obtained with EM modeling that includes the board
effects. These differences are illustrated through simulations (and measurements) of
voltage regulator output impedance and capacitor network impedance. These examples are
meant to drive home the need for EM modeling of both the voltage regulator and the power
distribution networks (PDNs) in which they are used. The last section discusses how
inaccuracies in vendor-supplied models of decoupling capacitors, and the general lack of
clarity as to whether they include mounting inductance, presents a barrier to accurate
power delivery simulations with EM models.
What you’ll learn:
- How to understand why EM modeling and simulation of voltage regulator circuits is needed to design power distribution networks for high-speed digital circuits
- How to understand what’s missing from lumped-SPICE simulations of voltage regulators and decoupling capacitors
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