Overcoming Power Challenges In Optical Transceivers With Two-Stage Buck Regulators
by Laurence McGarry, Jim Pflasterer, and Kubo Tatsuya, pSemi, San Jose, Calif., How2Power Today, Oct 15 2024
Focus:
This article introduces the two-stage buck regulator architecture as an innovative method
of achieving efficient conversion from high input to low output voltages (ex. 12 V to 1
V). In devices produced by pSemi, a stepdown charge pump and a buck converter are
integrated in a single, monolithic die. This article reviews the power requirements and
space constraints in optical transceivers that motivate the use of the two-stage
architecture. The key features of this architecture are then described followed by a more-
detailed explanation of how this architecture works and how it differs from a single-stage
buck converter. From there, the authors provide guidance on how to implement converter
designs based on the two-stage regulator, using pSemi’s PE24108 IC in the examples
presented. The selection of the required inductor, output capacitor, and compensation
components are covered, including cases where regulators are paralleled for higher power.
What you’ll learn:
- How to improve point-of-load power converter efficiency and shrink converter size using a charge pump + buck regulator architecture
- How to implement small, high efficiency point-of-load converters using pSemi’s PE24108 two- stage buck regulator
- How to power DSPs and ASICs in optical transceivers using a two-stage buck regulator
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