Bridgeless PFC Boosts Low-Line Efficiency

by Jon Mark Hancock, Principal Engineer, Infineon Technologies, N.A., Milpitas, Calif. , Power Electronics Technology, Feb 01 2008

Focus:
Although the bridgeless boost power factor correction (PFC) converter has not been widely adopted, its high efficiency makes it a good candidate for meeting the stringent energy efficiency standards that are likely to emerge in the future. It could potentially address the needs of power supplies used in telecom and computing, where high efficiency is needed not only at full load but also at lighter loads (10% to 50% loading) where the power supply typically operates. However, to make the bridgeless PFC viable in these applications, it may be necessary to change design methodology and design optimization. This article compares the basic bridgeless boost PFC converter to the conventional boost PFC converter and discusses some of the factors that have prevented adoption of the bridgeless boost such as high common-mode EMI and the requirement for isolated sense circuits. Then, two modified versions of the bridgeless PFC boost configuration are presented that address the limitations of basic bridgeless boost configuration, while also optimizing efficiency.

What you’ll learn:

• How to design a bridgeless boost PFC converter to meet power supply efficiency requirements in computing and telecom applications
• How to overcome high-EMI and other drawbacks when designing a bridgeless boost PFC converter

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