Frequency Dithering: A Tool for Overcoming Last-Minute EMC Hurdles
by Bob Bell and Ajay Hari, National Semiconductor, Phoenix, Ariz., How2Power Today, Sep 17 2009
Focus:
In an ideal design environment, designers will minimize the effects of EMI during power-converter circuit design and pc-board layout by applying best engineering practices such as good pc-board layout, design and filtering practices. But not every power converter is designed under ideal conditions. Often the converter's emissions are not measured until late in the development process when the power converter is integrated into the completed final assembly or system. Usually, at that time there is limited space to add extra filtering and no time to accommodate a redesign. One relatively simple (but controversial) way to reduce a converter's peak emissions and possibly pass the electromagnetic compatibility (EMC) requirements is to enable a clock-dithering circuit, which dithers the converter's switching frequency. This article examines some of the issues that arise when frequency dithering is applied to power converter designs and describes two techniques for implementing frequency dithering.
What you’ll learn:
- How to understand the benefits and limitations of frequency dithering when used to reduce power supply generated EMI
- How to add an external frequency dithering circuit to PWM controllers with resistor-programmed operating frequency
- How to implement frequency dithering in buck converters by using the LM5088-1, a controller with built-in dithering circuit
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