Optimizing Dead Time Selection in ZVS Topologies

by Sanjay Havanur, Senior Manager, System Applications, Vishay Siliconix, Santa Clara, CA, Power Electronics Technology, Jun 07 2012

Focus:
Dead time must be optimized in zero-voltage-switching (ZVS) topologies to avoid shoot through (if dead time is too short)and excessive losses (if dead time is too long). This article presents an analysis example demonstrating how a fixed dead time can be calculated. The topology in this example is a soft-switched full bridge operating with a 50% duty ratio per arm, but the analysis can be applied to other ZVS topologies. The analysis begins by describing the sequence in which the bridge’s four transistors are turned on and off, design considerations are discussed, and an equation for calculating dead time is determined. The article then presents experimental results for a bus converter, verifying the validity of the previously described analysis. Finally, the article discusses the importance of matching dead time to MOSFET characteristics to achieve optimum performance, presenting some test results illustrating this point.

What you’ll learn:

• How to determine optimum dead time for zero-voltage switched power converters with an eye toward selecting the best MOSFET for the application

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