Demystifying PSRR Specifications For LDOs
by Kern Wong, Principal Applications Engineer, Texas Instruments, Dallas, Texas, How2Power Today, Oct 15 2013
Focus:
While an LDO PSRR figure at higher frequencies often leads to improved system performance due to increased bandwidth in noise rejection, simply selecting the LDO with the highest PSRR does not necessarily produce the best results. As this article explains, LDO data sheet specifications are not as they seem and there are a variety of performance tradeoffs to consider when selecting LDOs for low noise or high PSRR. This article presents an analysis of LDO PSRR that explains how the output capacitor and other external components or parasitics determine an LDO’s PSRR at frequencies beyond the LDO’s crossover frequency. This explains why LDO datasheet plots of PSRR beyond 1 MHz can be highly misleading. Following the analysis of PSRR, various techniques for measuring PSRR are briefly described and some test tips are given. The article concludes with a discussion of LDO selection, describing the various options for noise performance and PSRR (these attributes are not the same) among older and newer LDOs, illustrating the tradeoffs with data from TI’s portfolio of LDOs, though most of this discussion is generic. This section provides tips on LDO selection and application.
What you’ll learn:
- How to understand the factors of LDO regulator design that determine PSRR
- How to understand tradeoffs in LDO design relating to noise performance and PSRR
- How to select LDOs to suit the noise or PSRR requirements of your application
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