Current-Mode Control Stability Analysis For DC-DC Converters (Part 1)

by Timothy Hegarty, Silicon Valley Analog, Texas Instruments, Tucson, Ariz., How2Power Today, Jun 13 2014

Focus:
Current-mode control (CMC) is an extremely popular dc-dc converter loop architecture—and with good reason. Simple operation and dynamics are achieved even though two loops, a wide-bandwidth current loop lurking inside an outer voltage loop, are required. Peak, valley, average, hysteretic, constant on-time, constant off-time, and emulated current-mode are commonly used. Each technique offers plusses and minuses pertaining to the overall design. This article, part one in a two-part series, highlights the fundamentals of loop stability in fixed-frequency, naturally sampled, peak current-mode, buck-derived converters, specifically for industrial and automotive applications. Following a brief review of the operating principles of peak and valley current-mode architectures, the small-signal model for peak current-mode control, including control-to-output transfer function, is set out in detail. The last section in part 1 explains why slope compensation is needed and the conditions under which it achieves converter stability.

What you’ll learn:

• How to understand the operation of power converters under peak current-mode control
• How to undertstand why slope compensation is required in current-mode controlled converters
• How to understand the tradeoffs among different forms of current-mode control

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