Simple Method Of Implementing Digital Loop Compensation In An FPGA

by Peter Markowski, Envelope Power, Ansonia, Conn., How2Power Today, Jul 15 2014

Focus:
This article explains how a standard linear compensator for power supplies can be implemented digitally in an FPGA. While there are already many references on this subject, most of them are unnecessarily complex and rely too much on the theory of discrete circuits. However, by applying the Model-Based Design methodology and using Matlab, Simulink and DSPBuilder, the task of implementing digital loop compensation in an FPGA can be relatively straightforward and reliable. In this article, the author presents a step-by-step design example of a type III compensator. Performance of the final design is discussed and tips for reducing cell count are given.

What you’ll learn:

• How to implement a type III power supply compensation circuit digitally in an FPGA using popular design tools

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