Cascode Configuration Eases Challenges Of Applying SiC JFETs In Switching Inductive Loads

by John Bendel, United Silicon Carbide (USCi), Monmouth Junction, N.J. , How2Power Today, Aug 15 2014

Focus:
Despite their parametric advantages, high-voltage SiC JFETs are seen as being difficult to implement when switching inductive loads due to non-standard drive voltages and a lack of an intrinsic diode. This article describes the use of a JFET in cascode to solve both of these issues. It will also highlight the general robustness of SiC JFETs in cascode with respect to short circuit and avalanche conditions. After explaining the operation of a SiC JFET plus silicon MOSFET cascode circuit, the dynamics of cascode switching will be discussed and the use of a QRR tester to evaluate the reverse-recovery characteristics of a cascode circuit will be explained. A comparison of the cascode’s reverse recovery with that of a SiC MOSFET reveals that the JFET cascode actually performs better than the SiC MOSFET over temperature. Further tests reveal that the cascode performs well at higher values of di/dt. Then, after presenting data on cascode robustness, some guidelines are given for selecting a low-voltage silicon MOSFET for use in JFET cascodes. Finally, a summary of the data presented here highlights the benefits of using a 1200-V SiC JFET in cascode versus a similarly rated SiC MOSFET, while also highlighting the JFET’s dramatic improvement in performance versus a conventional IGBT.

What you’ll learn:

• How to understand the benefits of a 1200-V SiC JFET in cascode with a low-voltage silicon MOSFET
• How to select a low-voltage silicon MOSFET for driving a 1200-V SiC JFET in a cascode circuit

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