by Tu Bui, Intersil, Dallas, Texas, How2Power Today, May 15 2015
Focus:
This article describes the underlying mechanism that is responsible for latch-up of FPGAs so that designers understand why tracking and sequencing are needed. Specifically, this article explains the impact of power supply start-up on the FPGA’s internal electrostatic discharge (ESD) protection diodes and how improper sequencing stresses these components. It then describes the use of ratiometric and coincidental tracking features of the ISL8002B stepdown regulator, which prevent an FPGA’s ESD diodes from biasing or being overstressed during rising or falling outputs. While ratiometric and coincidental tracking can be implemented with various voltage regulators, the ISL8002 has been designed to simplify the implementation of these techniques.
What you’ll learn:
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