Novel GIT Structure Solves Current Collapse In GaN Power HEMTs

by Howard Sin, Panasonic Semiconductor Solutions, Singapore and Saichiro Kaneko, Panasonic Semiconductor Solutions, Kyoto, Japan, How2Power Today, Sep 15 2015

Focus:
The current collapse phenomenon causes an increase in dynamic RDS(ON) that can lead to catastrophic device failure in GaN power transistors. According to Panasonic, it is the only GaN device vendor that has openly declared the complete elimination of current collapse. The company also asserts that the standard qualifying methodologies i.e. JEDEC and AEC cannot test for current collapse. This article describe a novel hybrid-drain gate injection transistor structure designed to eliminate current collapse and a dynamic testing procedure that tests for current collapse. After briefly explaining the cause of current collapse, the authors describe a novel structure that incorporates an additional p-GaN region near the drain. This new Hybrid-Drain-embedded gate injection transistor (HD-GIT) is compared with a conventional GIT, and its operation and how it solves current collapse (by injecting holes) are explained. Next, the authors describe a method of inductive hard switching testing that can be used to evaluate dynamic RDS(ON), which is then used to test both the conventional GIT and Panasonic’s HD-GIT. Finally, the authors address issues such as potential side effects of hole injection, other possible solutions for current collapse, and related power supply requirements.

What you’ll learn:

• How to understand the benefits of Panasonic’s Hybrid-Drain-embedded gate injection transistor in preventing current collapse in GaN power transistors
• How to test for current collapse in GaN power devices

View this Source (requires a PDF Viewer installed on your device)

• Return to Search Result
• Start Another Search
• How2Power Home
• How2Power Full Website